by ttul on 5/29/22, 7:09 PM
This is a fantastic program for teaching students about VHDL. You can make some really cool stuff on a 130nm process with 10mm^2 available. Like a full toy SoC. Really cool.
by FollowingTheDao on 5/29/22, 9:34 PM
I was very upset this was not about making Potato Chips. Seriously.
by f0e4c2f7 on 5/29/22, 7:31 PM
Schedule
April 11, 2022: Project submission is OPEN
June 8, 2022: Project submission is CLOSED
by bjt2n3904 on 5/29/22, 6:26 PM
> The repo must include project documentation and adhere to Google's inclusive language guidelines. See details here.
"Inclusive". Ah.
When I'm writing technical documentation, it has one goal: to describe the project to anyone who wants to use it. "Inclusivity" is not a part of my goalset.
by Sirened on 5/30/22, 3:04 AM
Does anyone have any in sight into how often they do these shuttles? Probably going to miss tapeout for this round but it'd be cool to get a physical chip some day, just for coolness.
by DaviNunes on 5/29/22, 6:56 PM
I wonder how difficult/efficient would it be to use this tech to design a bitcoin mining ASIC.
by ramshanker on 5/29/22, 10:00 PM
So how many transistors ( or GATES? ) that 10mm^2 is at 130nm?
by sideshowb on 5/29/22, 6:42 PM
Money for nothing...