by dangle1 on 6/6/25, 2:07 PM with 137 comments
by zackmorris on 6/6/25, 6:36 PM
I've written about it at length and I'm sure that anyone who's seen my comments is sick of me sounding like a broken record. But there's truly a vast realm of uncharted territory there. I believe that transputers and reprogrammable logic chips like FPGAs failed because we didn't have languages like Erlang/Go and GNU Octave/MATLAB to orchestrate a large number of processes or handle SIMD/MIMD simultaneously. Modern techniques like passing by value via copy-on-write (used by UNIX forking, PHP arrays and Clojure state) were suppressed when mainstream imperative languages using pointers and references captured the market. And it's really hard to beat Amdahl's law when we're worried about side effects. I think that anxiety is what inspired Rust, but there are so many easier ways of avoiding those problems in the first place.
by johnklos on 6/6/25, 6:07 PM
Just as a thought experiment, consider the fact that the i80486 has 1.2 million transistors. An eight core Ryzen 9700X has around 12 billion. The difference in clock speed is roughly 80 times, and the difference in number of transistors is 1,250 times.
These are wild generalizations, but let's ask ourselves: If a Ryzen takes 1,250 times the transistor for one core, does one core run 1,250 times (even taking hyperthreading in to account) faster than an i80486 at the same clock? 500 times? 100 times?
It doesn't, because massive amounts of those transistors go to keeping things in sync, dealing with changes in execution, folding instructions, decoding a horrible instruction set, et cetera.
So what might we be able to do if we didn't need to worry about figuring out how long our instructions are? Didn't need to deal with Spectre and Meltdown issues? If we made out-of-order work in ways where much more could be in flight and the compilers / assemblers would know how to avoid stalls based on dependencies, or how to schedule dependencies? What if we took expensive operations, like semaphores / locks, and built solutions in to the chip?
Would we get to 1,250 times faster for 1,250 times the number of transistors? No. Would we get a lot more performance than we get out of a contemporary x86 CPU? Absolutely.
by joshstrange on 6/7/25, 12:13 PM
How many times do we have to see these stories play out to realize it doesn’t matter where they came from. These big companies employee a lot of people of varying skill, having it on your resume means almost nothing IMHO.
Just look at the Humane pin full of “ex-Apple employees”, how’d that work out? And that’s only one small example.
I hope IO (OpenAi/Jony Ive) fails so spectacularly so that we have an even better example to point to and we can dispel the idea that if you did something impressive early in your career or worked for an impressive company, it doesn’t mean you will continue to do so.
by kleiba on 6/6/25, 5:32 PM
And that's not sarcasm, I'm serious.
by Ocha on 6/6/25, 3:00 PM
by Foobar8568 on 6/6/25, 4:10 PM
by jmclnx on 6/6/25, 3:17 PM
I wish them success, plus I hope they do not do what Intel did with its add-ons.
Hoping for an open system (which I think RISC-V is) and nothing even close to Intel ME or AMT.
https://en.wikipedia.org/wiki/Intel_Management_Engine
https://en.wikipedia.org/wiki/Intel_Active_Management_Techno...
by aesbetic on 6/6/25, 4:14 PM
by esafak on 6/6/25, 3:12 PM
by pstuart on 6/6/25, 5:30 PM
by ngneer on 6/6/25, 7:00 PM
https://www.notebookcheck.net/Intel-CEO-abruptly-trashed-Roy...
by rajnathani on 6/9/25, 10:43 AM
by saulpw on 6/6/25, 3:49 PM
by phendrenad2 on 6/6/25, 8:24 PM
by mixmastamyk on 6/6/25, 3:34 PM
by energy123 on 6/6/25, 5:34 PM
by logicchains on 6/6/25, 5:21 PM
by guywithahat on 6/6/25, 4:22 PM
by bluesounddirect on 6/6/25, 10:45 PM
by ahartmetz on 6/6/25, 3:18 PM
Are they going to make one with 16384 cores for AI / graphics or are they going to make one with 8 / 16 / 32 cores that can each execute like 20 instructions per cycle?
by constantcrying on 6/6/25, 3:34 PM
by whobre on 6/7/25, 4:34 PM
by 1970-01-01 on 6/6/25, 3:38 PM
by neuroelectron on 6/6/25, 6:08 PM