from Hacker News

Filament – A Language for Fearless Hardware Design

by nbrempel on 3/3/24, 6:06 AM with 31 comments

  • by thrtythreeforty on 3/5/24, 7:02 AM

    My experience with most "neo HDLs" is that they are all code generators which make the tedious part easy and don't really end up touching the hard part.

    This may be the first HDL I've seen that attempts to move the needle on catching bugs at compile time. (I've worked with several engineers, on hardware bugs which turned out to be pipelining errors, who did not understand what I meant by "make this design error inexpressible.") I have several pages of notes on what I'd do differently if I designed my own HDL - the typical software engineer hubris - and this is the first language I've seen that starts to line up with what I was thinking.

    Another perennial area where bugs crop up are when crossing clock and reset domains. The language ought to be able to make it so that you simply can't make many kinds of clock domain errors - trying to read a signal from the wrong clock domain shouldn't compile. Dedicated "unsafe" primitives from a stdlib should perform the crossing and the type conversion.

  • by bb88 on 3/5/24, 2:14 AM

    I think this is super interesting. Kind of like a rust style language for symbolic logic.

    The timing aspect is super interesting, though I wonder if a compiler given an fpga and a program could optimize the hard parts on an fpga and run the rest on a risc V core.

  • by unwind on 3/5/24, 8:09 AM

    Very cool.

    I was interested in the use of Filament to implement an entire RISC V processor ("frisc") but the link [1] at the bottom of the readme is broken and some quick searches of both Github and the web turned up nothing. Does anyone know what's up?

    [1]: https://github.com/cucapra/filament/tree/main/frisc

  • by j16sdiz on 3/5/24, 5:20 AM

    I never really understand how HDL works.

    I meant, in software programming, we usually program by either specifying the sequence or dependency.

    In hardware, nothing runs sequentially, and signals propagate _with delay_. Everything happens at the same time, yet nothing run at the exact same moment. How could we express these chaos in for-loops and procedure look alikes?

  • by gchadwick on 3/5/24, 11:41 AM

    Whilst I'm often quite sceptical of new HDLs (see my other comment on this post) it is nice to see HDL and other silicon content pop up so often on HN. There's a lot of keen people doing interesting things here and it's great to see all the new developments.

  • by speps on 3/5/24, 3:24 AM

    Also: Filament is a real-time physically-based renderer written in C++. It is mobile-first, but also multi-platform.

    https://google.github.io/filament/

  • by carterschonwald on 3/5/24, 4:39 AM

    There’s some fun pl work in this project

  • by irq-1 on 3/5/24, 4:49 PM

    html { font-weight: 100; }

    Can we please stop with illegible text? Color: 333 indeed.