from Hacker News

SiFive P550 Core: High-Performance RISC-V Processor

by andrewnc on 6/22/21, 2:36 PM with 84 comments

• by 1MachineElf on 6/22/21, 3:03 PM

  Hopefully the recent acquisition rumors don't spell the end of this healthy competition between x86 and RISC-V.

  I wonder what we'll see as a result of this partnership with Intel:

  SiFive also confirmed that the IFC RISC-V application development platform will use the Performance P550 core on Intel's 7nm Horse Creek platform.

  Link: https://www.phoronix.com/scan.php?page=news_item&px=SiFive-P...

• by ch_123 on 6/22/21, 10:09 PM

  I hope they release an update of the "Unmatched" motherboard with one of these chips. I'm reluctant to spend ~$700 on a platform which uses in-order cores which are presumably designed for low-power devices.

  (Yes, I appreciate I may not be the intended audience for that board, but I would still like to build a RISC-V based desktop one of these years)

• by zsmi on 6/22/21, 3:59 PM

  It's for sure an interesting result but honestly, perf/freq is yesterday's spec. What matters in 2021 is perf/W and perf/$ and there is no information on either of those metrics.

• by chem83 on 6/22/21, 11:02 PM

  The following is speculation on my part, so I'm inviting discussion. To some extent it feels SiFive is trying to turn RISC-V into ARM by locking it up in patents while at the same time holding the keys to the ratification of the various extensions, some of which (H-extensions being good example[1]) have been stuck without much development, slowing down sw support and making it difficult to upstream[2] what has been developed so far. Meanwhile, WorldGuard is available and perhaps thriving as closed, commercial IP. It feels like there could be some conflicts of interest there and, honestly, if Intel bought SiFive, it would at least make those intentions blatantly obvious.

  [1] https://lwn.net/ml/linux-kernel/CAAhSdy0F7gisk=FZXN7jmqFLVB3... [2] https://lists.riscv.org/g/tech-privileged/topic/risc_v_h_ext...

• by zozbot234 on 6/22/21, 4:29 PM

  The press release mentions that this is a triple-issue OOO design. Probably based on BOOM v3/SonicBOOM architecture[0], given what we know of previous SiFive designs.

  [0] https://github.com/riscv-boom/riscv-boom

• by nickik on 6/22/21, 4:07 PM

  Go work with System76 and get me a RISC-V RV64GCV Laptop. That would be awesome.

• by truncate on 6/22/21, 7:18 PM

  How does RISC-V places itself in market? What would be the advantage of going RISC over let say ARM (or x86)?

• by marcodiego on 6/22/21, 7:32 PM

  > said Amber Huffman, Intel Fellow and CTO of IP engineering group at Intel.

  Hope intel doesn't infect it with IME.

• by nullc on 6/23/21, 1:48 AM

  Nothing with bitmanip yet? :(