from Hacker News

Using chip memory more efficiently

by redtuesday on 7/9/17, 6:52 PM with 12 comments

• by valarauca1 on 7/10/17, 12:10 AM

  For those interested MIT 6.851 Advanced Data Structures covers Cache-Oblivious algorithms if your interested in the general CS/Coding techniques to maximize cache usage

  OpenCourseWare https://www.youtube.com/watch?v=bY8f4DSkQ6M

• by sitkack on 7/9/17, 9:31 PM

  Take what is fixed and make it flexible.

  Take what is one and make it many.

  Take what is repeated and make it one, and fast.

• by nachiketkapre on 7/9/17, 10:17 PM

  FPGA BlockRAMs have been configurable for the past two decades! The CPU architecture world is borrowing some good ideas from the FPGA architects.

• by tyfon on 7/9/17, 9:46 PM

  I wonder if projects like openblas can make use of this. Maybe it could be baked into the cpu too somehow.

  On the other hand, when reading the title I was preparing for a gory Amiga article. In this case it should be on-chip memory or is my non native english fooling me here? But it was at least in the same spirit ;)

• by amelius on 7/9/17, 9:53 PM

  I wonder how the OS is supposed to deal with this complexity. It probably needs an API for processes to reconfigure the cache. But then the cache can be private to a process or to a group of processes. Complicated stuff.