by MekaiGS on 9/2/15, 3:28 AM with 97 comments
by nhaehnle on 9/2/15, 8:45 AM
This is significant because as structure sizes become smaller, the restrictions on possible layouts (so called DRCs, design rule constraints) become ever stricter. For example, you can't just place wires wherever you want; you have to take into account the relationship to other wires. With stricter rules, the end result may be that the effective scaling achieved is worse than what the structure size suggests, because the rules force a lower density of transitors.
So what are Intel hiding? Are they far ahead of the competition in terms of DRCs and don't want others to know how much, or are they struggling (like apparently everybody else) and want to hide a less-than-ideal effective scaling? Obviously, your guess is as good as mine, but it's certainly fascinating to watch the competition as Moore's law is coming to an end.
by tychuz on 9/2/15, 9:46 AM
by TheLoneWolfling on 9/2/15, 1:16 PM
Among other things, discrete GPUs blow integrated GPUs out of the water, and the time-to-obsolescence of a GPU isn't anywhere near that of a CPU. It also makes sense from a cooling perspective - it's a whole lot easier to cool two chips in separate areas than one larger chip, generally speaking.
by skrause on 9/2/15, 8:17 AM
by MichaelGG on 9/2/15, 3:06 PM
Of course it also allows real DRM, where a remote server can verify you're running unmodified code.
But how does the key management work?
My personal interest is the continuing quest for a machine strong enough to develop, but not warm my hands at all. Macbooks are insanely hot (how can Apple even pretend to be about quality with those designs??), X250 ThinkPads is "alright" if I aggressively throttle the processor. Seems like the perf improvements are effectively dead so maybe we'll see cool laptops. Though OEMs seem to screw up as much as possible so who knows...
by chipaca on 9/2/15, 8:50 AM
by currysausage on 9/2/15, 9:03 AM
by throwaway7767 on 9/2/15, 1:31 PM
Can someone enlighten me? What does the chipset and CPU have to do with the power supply method? I'm assuming they're not including an RF power antenna on-die, so is this just code for "we got peak power consumption below the threshold practical with today's wireless power transmission devices"?
by uxcn on 9/2/15, 2:58 PM
Am I missing something?
by tkinom on 9/3/15, 1:46 AM
That's a long way to catch up with ARM SOC, right?
by glasz on 9/2/15, 10:22 AM